As known, in nonvolatile memories of the above indicated type, even multilevel programmable ones, there is an N-channel selection transistor arranged in series with a memory element or with a bit line connected to a plurality of memory cells. In particular, in the case of serial-flash memories, the selection transistor acts as a selector for enabling or not enabling a memory array partition; in flash-EEPROM memories in AMG and standard configurations and in EPROM memories, the selection transistor belongs to the column decoder which allows the addressed column to be biased at set potentials.
In all the above cases, the selection transistor must have a good driving capability of the cells connected thereto. This characteristic is fundamental so as to avoid limitations on the output current of the selected memory cell. Any current limitations on the one hand reduce the operating window of the cells and on the other hand increase the operating times necessary to perform the different tests implemented in memory devices.